Request PPC help

[pdb Banned Posts:70 Threads:1 Reputation 7]

If your 32 bit value is 0x80000000 or greater, the result will be 0xFFFFFFFF00000000 + original value
If your 32 bit value is 0x7FFFFFFF or less, the result will be the exact same as the original value

Thanks for your reply, here is more info about it 

 the value of r3 in this case can be anything from 0 - 17 (i think) and the first instruction using r3 is the "extsw r3, r3" which im unsure about what it does then further down the result in r3 is then cmpwi cr6, r3, 0 then a beq instruction which i understand what cmpwi does just not extsw

If the value doesn't have its high order bit 31 set, then the result is just the same. it's basically converting it from a 32 bit value to a 64 bit value, whilst keeping the negative state

[XBLxPhantom DF Member Posts:426 Threads:68 Reputation 5]

can anyone explain to me what extsw does i am learning PowerPC and i have an instruction "extsw r3, r3" ive looked on IBM website but it is sometimes hard to understand the website id really appreciate it if anyone can provide any help in general on PPC or on this particular instruction.

Thanks in advance :)

this might help  https://community.wemod.com/t/powerpc-be...orial/2039

Thank You, I don't have any use for ppc right now but if i do ill definitely look at this.

we have millions of uses for power pc.... lol talk about it on discord ;)

[GuruRefunds The Guru Posts:45 Threads:13 Reputation 14]

The contents of the low-order 32 bits of general purpose register (GPR) RS are placed into the low-order 32 bits of GPR RA. Bit 32 of GPR RS is used to fill the high-order 32 bits of GPR RA.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
XER:
Affected: CA

Feel free to contact me

[Justtestingit DF Member Posts:101 Threads:3 Reputation 0]

If your 32 bit value is 0x80000000 or greater, the result will be 0xFFFFFFFF00000000 + original value
If your 32 bit value is 0x7FFFFFFF or less, the result will be the exact same as the original value

Thanks for your reply, here is more info about it 

 the value of r3 in this case can be anything from 0 - 17 (i think) and the first instruction using r3 is the "extsw r3, r3" which im unsure about what it does then further down the result in r3 is then cmpwi cr6, r3, 0 then a beq instruction which i understand what cmpwi does just not extsw

If the value doesn't have its high order bit 31 set, then the result is just the same. it's basically converting it from a 32 bit value to a 64 bit value, whilst keeping the negative state

ok thanks very much i thought it was doing something like that but wasnt 100% sure thanks bro

---

The contents of the low-order 32 bits of general purpose register (GPR) RS are placed into the low-order 32 bits of GPR RA. Bit 32 of GPR RS is used to fill the high-order 32 bits of GPR RA.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
XER:
Affected: CA

Feel free to contact me

thanks for the reply, i understand now thanks alot for your help

[GuruRefunds The Guru Posts:45 Threads:13 Reputation 14]

If your 32 bit value is 0x80000000 or greater, the result will be 0xFFFFFFFF00000000 + original value
If your 32 bit value is 0x7FFFFFFF or less, the result will be the exact same as the original value

Thanks for your reply, here is more info about it 

 the value of r3 in this case can be anything from 0 - 17 (i think) and the first instruction using r3 is the "extsw r3, r3" which im unsure about what it does then further down the result in r3 is then cmpwi cr6, r3, 0 then a beq instruction which i understand what cmpwi does just not extsw

If the value doesn't have its high order bit 31 set, then the result is just the same. it's basically converting it from a 32 bit value to a 64 bit value, whilst keeping the negative state

ok thanks very much i thought it was doing something like that but wasnt 100% sure thanks bro

---

The contents of the low-order 32 bits of general purpose register (GPR) RS are placed into the low-order 32 bits of GPR RA. Bit 32 of GPR RS is used to fill the high-order 32 bits of GPR RA.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
XER:
Affected: CA

Feel free to contact me

thanks for the reply, i understand now thanks alot for your help

You are most welcome

[MaxModz DF Member Posts:180 Threads:9 Reputation -6]

we have millions of uses for power pc.... lol talk about it on discord ;)

Bet.

[Giths Guest Posts:N/A Threads: Reputation]

can anyone explain to me what extsw does i am learning PowerPC and i have an instruction "extsw r3, r3" ive looked on IBM website but it is sometimes hard to understand the website id really appreciate it if anyone can provide any help in general on PPC or on this particular instruction.

Thanks in advance :)

hey, this might be too late or someone has answered it, but in short the assembly tool "extsw" just copies the 32bits of one register into another and sign extend the word into a 64bit doublesize word. hope this helps.